3BHB006338R0001 Gate driver port

When the gate drive voltage is applied in the range of ±20V, the oxide film (SiO2) between the gate and emission electrode may cause insulation damage or reliability decline.

The gate voltage should not exceed 20V, otherwise the IGBT gate will be damaged. In the driver circuit design, it is recommended to detect the driver power supply voltage (AD sampling).
The gate protects Zener diode (18V) or so, and the selection should pay attention to the selection of high temperature leakage current while paying attention to the stable voltage range (the highest value can not exceed 20V);
Gate protection adds a pull-down resistor to provide a low channel loop for the displacement current while adding a clamp diode clamp to the drive supply positive terminal.
On – Gate drive voltage:

On – The gate drive voltage standard is +15V. Low gate drive voltages such as 12V and 10V will cause increased collector losses. The IGBT is basically not turned on at 6V, and the power supply voltage is applied to the collector-emitter at this time. When such a low gate voltage is applied, it is possible to cause component damage due to excessive losses.

Gate reverse bias voltage (-VGE) at shutdown:

In order to avoid misoperation due to noise interference, apply a reverse bias voltage of (-5V)-(-15V) to the IGBT gate when switching off.

The relationship between gate voltage at opening and gate reverse bias voltage at closing and switching speed-noise interference:

If the opening gate voltage +VGE is increased, the opening speed will increase and the opening loss will decrease. On the contrary, the noise interference will increase when it is turned on. Similarly, if the turn-off gate voltage -VGE is increased, the turn-off speed will increase and the turn-off loss will decrease. Instead, turn off the waves

Surge voltage and noise interference will increase. +VGE, -VGE, and the RG of the next item are all major factors affecting the switching speed.

Gate impedance RG and switching characteristics:

Gate capacitance:

Input capacitance: Cies = Cge + Cgc

Reverse Transfer capacitor: Cres = Cgc

Output capacitance: Coes = Cce + Cgc

Emitter gate reverse bias voltage and gate-emitter impedance RGE:

The displacement current flows due to the high dv/dt, and the gate potential rises.

The gate reverse bias voltage and bypass resistance are effective in reducing impulse current (IGBT loss)

Gate wiring:

To avoid harmful oscillations, note the following.

● Try to keep the gate pole wiring away from the main circuit wiring, and avoid making the two parallel.